International Business Machines Corporation
Isolation structure for stacked vertical transistors
Last updated:
Abstract:
A method for manufacturing a semiconductor device includes forming a first vertical transistor on a semiconductor substrate, and forming a second vertical transistor stacked on the first vertical transistor. In the method, an isolation layer is formed between the first and second vertical transistors. The isolation layer includes a rare earth oxide.
Status:
Grant
Type:
Utility
Filling date:
17 Apr 2019
Issue date:
3 Aug 2021