International Business Machines Corporation
Software-invisible interrupt for a microprocessor

Last updated:

Abstract:

Examples described herein provide a computer-implemented method that includes executing, by the microprocessor, instructions in an instruction stream of the microprocessor. The method further includes triggering, by control logic of the microprocessor, error condition monitoring logic. The method further includes executing, by the error condition monitoring logic of the microprocessor, an error instruction stream built into the microprocessor to break the microprocessor out of an error condition.

Status:
Grant
Type:

Utility

Filling date:

19 Sep 2019

Issue date:

3 Aug 2021