International Business Machines Corporation
NANOSHEET TRANSISTOR HAVING PARTIALLY SELF-LIMITING BOTTOM ISOLATION EXTENDING INTO THE SUBSTRATE AND UNDER THE SOURCE/DRAIN AND GATE REGIONS

Abstract:

Embodiments of the invention are directed to a method of performing fabrication operations to form a nanosheet field effect transistor (FET) device. The fabrication operations include forming a nanosheet stack over a portion of a substrate. A first source or drain (S/D) trench is formed adjacent to a first end of the nanosheet stack. A second S/D trench is formed adjacent to a second end of the nanosheet stack. A region of the substrate is removed to form a bottom dielectric isolation (BDI) cavity in the substrate, wherein the BDI cavity is positioned beneath at least the nanosheet stack, the first S/D trench, and the second S/D trench. The BDI cavity is filled with a dielectric material, thereby forming a BDI region positioned beneath at least the nanosheet stack, the first S/D trench, and the second S/D trench.