International Business Machines Corporation
MRAM integration into the MOL for fast 1T1M cells

Abstract:

A memory cell is provided in which a bottom electrode of a magnetoresistive random access memory (MRAM) device is connected to one of the source/drain contact structures of a transistor, and a lower contact structure is connected to another of the source/drain contact structures of the transistor. In the present application, the MRAM device and the lower contact structure are present in the middle-of-the-line ((MOL) not the back-end-of-the-line (BEOL). Moreover, the bottom electrode of the MRAM device, and a lower portion of the lower contact structure are present in a same dielectric material (i.e., a MOL dielectric material).