International Business Machines Corporation
Hardware accelerator with locally stored macros

Abstract:

Provided are techniques for a hardware accelerator with locally stored macros. A plurality of macros are stored in a lookup memory of a hardware accelerator. In response to receiving an operation code, the operation code is mapped to one or more macros of the plurality of macros, wherein each of the one or more macros includes micro-instructions. Each of the micro-instructions of the one or more macros is routed to a function block of a plurality of function blocks. Each of the micro-instructions is processed with the plurality of function blocks. Data from the processing of each of the micro-instructions is stored in an accelerator memory of the hardware accelerator. The data is moved from the accelerator memory to a host memory.