International Business Machines Corporation
ISOLATION STRUCTURE FOR STACKED VERTICAL TRANSISTORS
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Abstract:
A method for manufacturing a semiconductor device includes forming a first vertical transistor on a semiconductor substrate, and forming a second vertical transistor stacked on the first vertical transistor. In the method, an isolation layer is formed between the first and second vertical transistors. The isolation layer includes a rare earth oxide.
Status:
Application
Type:
Utility
Filling date:
14 Jun 2021
Issue date:
30 Sep 2021