International Business Machines Corporation
LOW-NOISE GATE-ALL-AROUND JUNCTION FIELD EFFECT TRANSISTOR

Abstract:

A Vertical Junction Field Effect Transistor (VJFET) is disclosed with reduced noise and input capacitance and high input impedance. The VJFET has a substrate; a source disposed on the substrate; a drain; and a channel. The vertical channel has one or more channel sidewall surfaces. The channel sidewall surfaces have a total or aggregate channel sidewall surface area. A semiconductor gate grown on one or more of the channel sidewall surfaces has a thickness below 10 nanometers (nm), or between 3 nm and 10 nm, that reduces transistor noise. The interface surface area between the conductive (e.g. metal) external electrical gate contact and the contacted surface of the semiconductor gate is minimized to further reduce transistor noise.