International Business Machines Corporation
Top vias with subtractive line formation

Last updated:

Abstract:

Integrated chips and methods of forming the same include forming a conductive layer to a line height. A dielectric layer is formed over the conductive layer to a via height, with at least one opening that exposes a via region of the conductive layer. A conductive via is formed in the opening having the via height. The conductive layer is patterned to form a conductive line having the line height.

Status:
Grant
Type:

Utility

Filling date:

23 Jan 2020

Issue date:

26 Oct 2021