International Business Machines Corporation
Vertical field effect transistor with self-aligned source and drain top junction
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Abstract:
A semiconductor structure, and a method for forming the same includes an amorphous semiconductor layer in contact with a top surface of a channel fin extending vertically from a bottom source/drain located above a substrate. A hard mask memorization layer is formed directly above the amorphous semiconductor layer, portions of the amorphous semiconductor layer in contact with the top surface of the channel fin are recrystallized forming recrystallized regions. The amorphous semiconductor layer is selective removed and a second dielectric layer is deposited to form a top spacer. The hard mask memorization layer and the recrystallized regions are removed, and a first epitaxial region is formed above the channel fin followed by a second epitaxial region positioned above the first epitaxial region and between the second dielectric layer forming a top source/drain of the semiconductor structure.
Utility
28 Feb 2020
16 Nov 2021