International Business Machines Corporation
STACKED FET MULTIPLY AND ACCUMULATE INTEGRATED CIRCUIT
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Abstract:
An embodiment of the invention may include a method of forming and a resulting multiply-and-accumulate device. The device may include a capacitor in a second region. The capacitor comprises a dielectric located between a first metal contact and a second metal contact. The device may include a stacked nanosheet device in the first region from the nanosheet. The stacked nanosheet device may include a top transistor and a bottom transistor in contact with the first metal contact. The device may include a nanosheet device in the third region, wherein a source/drain of a transistor of the nanosheet device is in contact with the first metal contact.
Status:
Application
Type:
Utility
Filling date:
11 May 2020
Issue date:
11 Nov 2021