International Business Machines Corporation
Transistor with reduced gate resistance and improved process margin of forming self-aligned contact

Last updated:

Abstract:

A semiconductor structure is provided that includes a gate conductor structure having a middle portion that has a vertical thickness that is greater than a vertical thickness of each end portion, and a self-aligned dielectric gate cap located on the gate conductor structure and having a middle portion that has a vertical thickness that is less than a vertical thickness of each end portion. The aforementioned gate conductor structure, which is taller in the middle and shorter at the edges, has reduced gate resistance, while the aforementioned self-aligned dielectric gate cap, which is taller at the edges and shorter in the middle, increases process margin for contact formation.

Status:
Grant
Type:

Utility

Filling date:

9 Oct 2018

Issue date:

7 Dec 2021