International Business Machines Corporation
MOSFET with ultra low drain leakage

Last updated:

Abstract:

A semiconductor device includes a monocrystalline substrate configured to form a channel region between two recesses in the substrate. A gate conductor is formed on a passivation layer over the channel region. Dielectric pads are formed in a bottom of the recesses and configured to prevent leakage to the substrate. Source and drain regions are formed in the recesses on the dielectric pads from a deposited non-crystalline n-type material with the source and drain regions making contact with the channel region.

Status:
Grant
Type:

Utility

Filling date:

17 Aug 2018

Issue date:

14 Dec 2021