International Business Machines Corporation
Resistive memory cell having a single fin

Abstract:

A method for fabricating a semiconductor device including a resistive memory cell having a single fin includes concurrently forming a vertical transistor and a resistive element on a base substrate, including forming a first gate structure corresponding to a gate of the vertical transistor and a second gate structure corresponding to an electrode of the resistive element, forming a top source/drain layer on a fin formed on a bottom source/drain layer disposed on the base substrate, and forming a plurality of contacts. Forming the plurality of contacts includes forming a first contact corresponding to the first gate structure, a second contact corresponding to the top source/drain region and a third contact corresponding to the second gate structure.