International Business Machines Corporation
Testing SRAM structures

Abstract:

A technique relates probing a pass gate transistor in a static random access memory (SRAM) circuit. A gate probe is connected to a gate metal layer of the SRAM circuit, the gate metal layer being coupled to a gate of the pass gate transistor. A source probe is connected to a source metal layer of the SRAM circuit, the source metal layer being coupled to a source of the pass gate transistor. A drain probe is connected to a drain metal layer of the SRAM circuit, the drain metal layer being coupled to a drain of the pass gate transistor, the SRAM circuit comprising other transistors along with the pass gate transistor. The other transistors are free from connections for the probing so as not to cause the other transistors to have an unwanted effect on the pass gate transistor being probed.