International Business Machines Corporation
Top vias with selectively retained etch stops
Last updated:
Abstract:
Integrated chips and methods of forming the same include forming conductive lines on an underlying layer, between regions of dielectric material. The regions of dielectric material are selectively patterned, leaving at least one dielectric remnant region. An interlayer dielectric is formed over the underlying layer and the at least one dielectric remnant region, between the conductive lines.
Status:
Grant
Type:
Utility
Filling date:
23 Jan 2020
Issue date:
29 Mar 2022