International Business Machines Corporation
INTERCONNECTS HAVING SPACERS FOR IMPROVED TOP VIA CRITICAL DIMENSION AND OVERLAY TOLERANCE
Last updated:
Abstract:
A method of fabricating an integrated circuit includes forming a first trench such that a portion of the first trench is defined by a portion of a first-type of interconnect and depositing a sacrificial spacer liner in the first trench to cover the portion of the first-type of interconnect element. The method further includes forming a dielectric cap on the sacrificial spacer liner and above the first-type of interconnect element, removing the dielectric cap to expose at least a portion of the first-type of interconnect element, and forming a second-type of interconnect element on the exposed first-type of interconnect element.
Status:
Application
Type:
Utility
Filling date:
3 Feb 2022
Issue date:
19 May 2022