International Business Machines Corporation
Multifunction single via patterning

Abstract:

A method for semiconductor device fabrication includes forming storage elements on conductive structures. An interlevel dielectric (ILD) layer is formed over the storage elements. Trenches are patterned in the ILD layer to expose a top portion of the storage elements. The storage elements where interlevel vias are to be formed is removed. A conductive material is deposited in the trenches and the via openings to concurrently make contact with the storage elements and form interlevel vias in the via openings.