International Business Machines Corporation
MULTI THRESHOLD VOLTAGE FOR NANOSHEET

Abstract:

A semiconductor structure including nanosheet stacks on a substrate, each nanosheet stack including alternating layers of sacrificial semiconductor material and semiconductor channel material and a crystallized gate dielectric layer surrounding the semiconductor channel layers of a first subset of the nanosheet stacks, a dipole layer on top of the crystallized gate dielectric and surrounding the layers of semiconductor channel material of the first subset of the nanosheet stacks and a gate dielectric modified by a diffused dipole material surrounding the semiconductor channel layers of a second subset of the nanosheet stacks. A method including forming nanosheet stacks on a substrate, each nanosheet stack including alternating layers of sacrificial semiconductor material and semiconductor channel material, removing sacrificial semiconductor material layers of the set of nanosheet stacks, forming a gate dielectric surrounding the semiconductor channel layers of the nanosheet stacks, and crystalizing the gate dielectric of a subset of the nanosheet stacks.