International Business Machines Corporation
QUANTUM PROCESSOR ARCHITECTURE WITH COMPILER SUPPORT

Abstract:

Techniques regarding superconducting quantum processor architectures and/or VQE compiler optimizations are provided. For example, one or more embodiments described herein can regard an apparatus comprising a superconducting quantum processor topology that employs an X-tree architecture to delineate connections between superconducting qubits. Also, a total number of the connections can be less than a total number of the superconducting qubits.