International Business Machines Corporation
REMOVAL OR REDUCTION OF CHAMFER FOR FULLY-ALIGNED VIA

Last updated:

Abstract:

A method for manufacturing a semiconductor device includes forming a first interconnect in a first dielectric layer, and forming a second dielectric layer on the first dielectric layer. In the method, an etch stop layer is formed on the second dielectric layer, and a third dielectric layer is formed on the etch stop layer. The method also includes forming a trench in the third dielectric layer, wherein a bottom surface of the trench includes the etch stop layer. A second interconnect is formed in the trench on the etch stop layer, and a via is formed in the second dielectric layer. The via connects the second interconnect to the first interconnect.

Status:
Application
Type:

Utility

Filling date:

16 Jan 2020

Issue date:

22 Jul 2021