International Business Machines Corporation
RESISTIVE RANDOM ACCESS MEMORY CELLS INTEGRATED WITH VERTICAL FIELD EFFECT TRANSISTOR

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Abstract:

A one-transistor-two-resistor (1T2R) resistive random access memory (ReRAM) structure, and a method for forming the same, includes forming a vertical field effect transistor (VFET) including an epitaxial region located above a channel region and below a dielectric cap. The epitaxial region includes two opposing protruding regions of triangular shape bounded by <111> planes that extend horizontally beyond the channel region. A ReRAM stack is conformally deposited on the VFET. The ReRAM stack includes an oxide layer located directly above the epitaxial region, a top electrode layer directly above the oxide layer and a metal fill above the top electrode layer. Each of the two opposing protruding regions of the epitaxial region acts as a bottom electrode for the ReRAM stack.

Status:
Application
Type:

Utility

Filling date:

20 Dec 2019

Issue date:

24 Jun 2021