International Business Machines Corporation
Array clocking in emulation

Abstract:

Examples of techniques for emulating an application-specific integrated circuit (ASIC) array using a field programmable gate array (FPGA) are disclosed. In one example implementation according to aspects of the present disclosure, a method may include loading configuration information to the FPGA, wherein the configuration information is representative of configuration information of the ASIC. The method may further include emulating the ASIC using the FPGA loaded with the configuration information by applying a fast emulation clock signal to the FPGA. The fast emulation clock signal is a multiple of a system clock signal.