Intel Corporation
Techniques for prefetching data to a first level of memory of a hierarchical arrangement of memory
Last updated:
Abstract:
Examples include techniques to prefetch data from a second level of memory of a hierarchical arrangement of memory to a second level of memory of the hierarchical arrangement of memory. Examples include circuitry for a processor receiving a prefetch request from a core of the processor to prefetch data from the first level to the second level. The prefetch request indicating an amount of data to prefetch that is greater than a data capacity of a cache line utilized by the core.
Status:
Grant
Type:
Utility
Filling date:
28 Mar 2018
Issue date:
24 Aug 2021