Intel Corporation
Enhancing hierarchical depth buffer culling efficiency via mask accumulation

Abstract:

Embodiments described herein provide for a technique to improve the culling efficiency of coarse depth testing. One embodiment provides for a graphics processor that includes a depth pipeline that is configured to perform a method to track a history of source fragments that are tested against a destination tile. When a combination of partial fragments sum to full coverage, the most conservative source far depth value is used instead of the previous destination far depth value.