Intel Corporation
BUFFER THAT SUPPORTS BURST TRANSFERS HAVING PARALLEL CRC AND DATA TRANSMISSIONS

Abstract:

A method is described. The method includes a buffer semiconductor chip receiving a plurality of data signals. The method includes the buffer chip calculating first CRC information from the plurality of data signals. The method includes the buffer chip transmitting the plurality of data signals in parallel with the first CRC information if a read burst transfer sequence is being performed, the buffer chip receiving second CRC information in parallel with the plurality of data signals and comparing the first CRC information with the second CRC information if a write burst transfer sequence is being performed.