Intel Corporation
INTERCONNECT STACK WITH LOW-K DIELECTRIC
Last updated:
Abstract:
Embodiments may relate to a microelectronic package with an interconnect stack that includes a cavity therein. The cavity may include a dielectric material with a dielectric value less than 3.9. The microelectronic package may further include first and second conductive elements in the cavity, with the dielectric material positioned therebetween. Other embodiments may be described or claimed.
Status:
Application
Type:
Utility
Filling date:
12 Mar 2020
Issue date:
16 Sep 2021