Intel Corporation
Method, Apparatus And System For Dynamic Control Of Clock Signaling On A Bus
Last updated:
Abstract:
In an embodiment, a host controller includes a clock control circuit to cause the host controller to communicate a clock signal on a clock line of an interconnect, the clock control circuit to receive an indication that a first device is to send information to the host controller and to dynamically release control of the clock line of the interconnect to enable the first device to drive a second clock signal onto the clock line of the interconnect for communication with the information. Other embodiments are described and claimed.
Status:
Application
Type:
Utility
Filling date:
3 Jun 2021
Issue date:
16 Sep 2021