Intel Corporation
CMOS circuit with vertically oriented n-type transistor and method of providing same

Last updated:

Abstract:

Techniques and mechanisms for providing a space efficient complementary metal-oxide-semiconductor (CMOS) circuit. In an embodiment, a p-type transistor of a circuit is to conduct current in a direction parallel to a surface of a semiconductor substrate, wherein an n-type thin film transistor (TFT) of the circuit is to conduct current in a direction which is orthogonal to the surface. A first interconnect is directly coupled to each of the two transistors, wherein the first interconnect, a high mobility channel structure of the n-type TFT, and a source or drain of the p-type transistor are on the same line of direction. A second interconnect comprises a conductive path which extends to respective gates of the p-type transistor and the n-type TFT, wherein the conductive path is limited to a region over a footprint of the p-type transistor. In another embodiment, functionality of a logical inverter is provided with the circuit.

Status:
Grant
Type:

Utility

Filling date:

30 Mar 2018

Issue date:

5 Oct 2021