Intel Corporation
MEMORY BUS LINK AUTHENTICATION AND ENCRYPTION MECHANISMS FOR HARDWARE-BASED REPLAY PROTECTION

Abstract:

In one embodiment, a system includes a processor and a memory module coupled to the processor over a memory bus. The processor and memory module perform a key exchange at boot to obtain an encryption key. The processor generates first ciphertext by encrypting plaintext data using a first encryption protocol, and generates second ciphertext by encrypting the first ciphertext using a second encryption protocol based on the encryption key obtained at boot. The second ciphertext is transmitted to the memory module via the memory bus. The memory module decrypts the second ciphertext based on the encryption key obtained at boot to yield third ciphertext, and stores the third ciphertext.