Intel Corporation
Providing I3C Communications Of Multiple Data Lines Via A Universal Serial Bus

Abstract:

In one embodiment, an apparatus includes: a converter to receive and convert single-ended data to differential data, and receive and convert a single-ended clock signal to a differential clock signal; a multiplexer coupled to the converter to receive the differential data and the differential clock signal; and a controller coupled to the multiplexer. In response to an indication that a device coupled to the apparatus is capable of an alternate mode, the controller is to configure the multiplexer to send the differential data on at least one of a plurality of differential pairs of data lanes. Other embodiments are described and claimed.