Intel Corporation
SEMICONDUCTOR PACKAGE WITH HYBRID MOLD LAYERS

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Abstract:

According to various examples, a device is described. The device may include a first package substrate. The device may also include a first mold layer with a first thickness. The device may also include a second mold layer with a second thickness proximal to the first mold layer. The second thickness may be larger than the first thickness. The first mold layer may include a plurality of first interconnects coupled to the first package substrate. The second mold layer may include a plurality of second interconnects configured to couple the first package substrate to a printed circuit board.

Status:
Application
Type:

Utility

Filling date:

6 Jul 2021

Issue date:

28 Oct 2021