Intel Corporation
METALLIZATION STRUCTURES UNDER A SEMICONDUCTOR DEVICE LAYER

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Abstract:

Metallization structures under a semiconductor device layer. A metallization structure in alignment with semiconductor fin may be on a side of the fin opposite a gate stack. Backside and/or frontside substrate processing techniques may be employed to form such metallization structures on a bottom of a semiconductor fin or between bottom portions of two adjacent fins. Such metallization structures may accompany interconnect metallization layers that are over a gate stack, for example to increase metallization layer density for a given number of semiconductor device layers.

Status:
Application
Type:

Utility

Filling date:

9 Jul 2021

Issue date:

4 Nov 2021