Intel Corporation
Method and apparatus for performing non-unique data pattern detection and alignment in a receiver implemented on a field programmable gate array

Abstract:

A method for performing pattern detection and alignment on a programmable logic device is disclosed. A word aligner unit, implemented by a hard intellectual property block, is configured to detect a plurality of control characters by recognizing a proper subset of bits that are common among the plurality of control characters. It is determined whether a predetermined number of consecutive control characters has been detected in a frame of data. A boundary location associated with a detected predetermined number of consecutive control characters from the word aligner unit is identified. The frame of data is aligned in response to the boundary location associated with the detected predetermined number of consecutive control characters.