Intel Corporation
Systems and methods for region-based error detection and management in integrated circuits

Abstract:

Systems and methods for detecting and managing errors in integrated circuits are provided. In one example, a system includes an integrated circuit that includes configuration memory that defines a circuit design implemented by the integrated circuit. The circuit design includes a plurality of regions. Additionally, the system is configured to determine a physical location of an error in the configuration memory and determine a location in a floorplan of the configuration memory that corresponds to the physical location of the error in the configuration memory. The floorplan identifies where the plurality of regions are defined in the configuration memory. The system is configured to determine in which of the plurality of regions the error in the configuration memory has occurred based at least in part on the location in the floorplan. Also, the system is configured to perform a corrective operation based on the location in the floorplan.