Intel Corporation
Persistent memory write semantics on PCIe with existing TLP definition

Last updated:

Abstract:

Aspects of the disclosure are directed to systems, methods, and devices that include an application processor. The application processor includes an interface logic to interface with a communication module using a bidirectional interconnect link compliant with a peripheral component interconnect express (PCIe) protocol. The interface logic to receive a data packet from across the link, the data packet comprises a header and data payload; determine a hint bit set in the header of the data packet; determine a steering tag value in the data packet header based on the hint bit set; and transmit the data payload to non-volatile memory based on the steering tag set in the header.

Status:
Grant
Type:

Utility

Filling date:

29 Sep 2016

Issue date:

4 Jan 2022