Intel Corporation
Electroless-catalyst doped-mold materials for integrated-circuit die packaging architectures
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Abstract:
Disclosed embodiments include a catalyst-doped mold interconnect system, where activated catalyst particles that line via and trace corridors, are used for electroless-plating formation of both liners and vias and traces that also electrolessly plate onto the liners. Photolithographically formed interconnects can be mingled with laser-ablation form-factor vias and traces within a single stratum of a catalyst doped mold interconnect system.
Status:
Grant
Type:
Utility
Filling date:
25 Sep 2019
Issue date:
18 Jan 2022