Intel Corporation
MEMORY POOL DATA PLACEMENT TECHNOLOGIES

Abstract:

Examples described herein relate to a network interface device, when operational, configured to: select data of a region of addressable memory addresses to migrate from a first memory pool to a second memory pool to lower a transit time of the data of the region of addressable memory addresses to a computing platform. In some examples, selecting data of a region of addressable memory addresses to migrate from a first memory pool to a second memory pool is based at least, in part, on one or more of: (a) memory bandwidth used to access the data; (b) latency to access the data from the first memory pool by the computing platform; (c) number of accesses to the data over a window of time by the computing platform; (d) number of accesses to the data over a window of time by other computing platforms over a window of time; (e) historic congestion to and/or from one or more memory pools accessible to the computing platform; and/or (f) number of different computing platforms that access the data.