Intel Corporation
Hybrid Boards with Embedded Planes

Abstract:

The present disclosure is directed to a hybrid dielectric interconnect stack for a printed circuit board having a first dielectric layer with a first dielectric constant and a first dielectric loss tangent positioned over an intermediate layer, which includes a first dielectric sublayer with a first sublayer dielectric constant and a first sublayer dielectric loss tangent, an embedded conductive layer, and a second dielectric sublayer with a second sublayer dielectric constant and a second sublayer dielectric loss tangent, in which the embedded conductive layer is positioned between the first and second dielectric sublayers, and a second dielectric layer with a second dielectric constant and a second dielectric loss tangent, in which the intermediate layer is positioned between the first and second dielectric layers.