Intel Corporation
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING STRAINED SOURCE OR DRAIN STRUCTURES ON INSULATOR

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Abstract:

Gate-all-around integrated circuit structures having strained source or drain structures on an insulator layer, and methods of fabricating gate-all-around integrated circuit structures having strained source or drain structures on an insulator layer, are described. For example, an integrated circuit structure includes an insulator layer above a substrate. A vertical arrangement of horizontal semiconductor nanowires is over the insulator layer. A gate stack is surrounding a channel region of the vertical arrangement of horizontal semiconductor nanowires, and the gate stack is on the insulator layer. A pair of epitaxial source or drain structures is at first and second ends of the vertical arrangement of horizontal semiconductor nanowires and on the insulator layer. Each of the pair of epitaxial source or drain structures has a compressed or an expanded lattice.

Status:
Application
Type:

Utility

Filling date:

25 Jun 2020

Issue date:

30 Dec 2021