Intel Corporation
Semiconductor package having polymeric interlayer disposed between conductive elements and dielectric layer

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Abstract:

The present disclosure provides a substrate for an integrated circuit. The substrate includes a dielectric layer. The substrate further includes a plurality of conductive elements at least partially embedded within the dielectric layer and having a substantially smooth outer surface. The substrate further includes an interlayer disposed between the individual conductive elements and the dielectric layer. The interlayer has a first surface comprising a plurality of protrusions interlocked with the dielectric layer and a second surface adhered to the outer surface of the individual conductive elements.

Status:
Grant
Type:

Utility

Filling date:

30 Jun 2017

Issue date:

22 Feb 2022