Intel Corporation
High performance clock domain crossing FIFO

Last updated:

Abstract:

The disclosure relates to clock-crossing elements that may be used to transfer data between different clock domains. The embodiments include dual clock first-in first-out (FIFO) buffers that may employ toggle-based protocols to manage the transference of information regarding the state of the FIFO buffer. The toggle-based protocols may include a feedback-based handshake and bit-sliced toggle lines to prevent errors due to differences between the clock signals in the different clock domains.

Status:
Grant
Type:

Utility

Filling date:

28 Jun 2019

Issue date:

15 Feb 2022