Intel Corporation
Frequency synthesis with reference signal generated by opportunistic phase locked loop

Abstract:

Systems, methods, and circuitries are provided to generate a radio frequency (RF) signal having a desired radio frequency f.sub.RF. In one example a frequency synthesizer system includes a clock, an opportunistic phase locked loop (PLL), and an RF PLL. The clock circuitry is configured to generate a clock signal having a frequency f.sub.XTL. The opportunistic phase locked loop (PLL) is configured to generate a reference signal having a reference frequency f.sub.REF that is close to a free-running frequency of an oscillator in the opportunistic PLL. The opportunistic PLL is configured to synchronize the reference signal to the clock signal. The RF PLL is configured to generate the RF signal having the desired radio frequency and to synchronize the RF signal with the reference signal.