Intel Corporation
METHODS OF FORMING DISLOCATION ENHANCED STRAIN IN NMOS AND PMOS STRUCTURES
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Abstract:
Methods of forming a strained channel device utilizing dislocations disposed in source/drain structures are described. Those methods and structures may include forming a thin silicon germanium material in a source/drain opening of a device comprising silicon, wherein multiple dislocations are formed in the silicon germanium material. A source/drain material may be formed on the thin silicon germanium material, wherein the dislocations induce a tensile strain in a channel region of the device.
Status:
Application
Type:
Utility
Filling date:
12 Oct 2021
Issue date:
24 Feb 2022