Intel Corporation
Dynamic logic built with stacked transistors sharing a common gate

Last updated:

Abstract:

A dynamic logic circuit including a first transistor within a first device stratum of a substrate; and a second transistor within a second device stratum of the substrate that is different from the first device stratum, wherein the first transistor and the second transistor share a common gate electrode. A method including disposing a second semiconductor body of a second transistor on a first semiconductor body of a first transistor in a first device stratum on a substrate, the second semiconductor body defining a second device stratum; and forming a common gate electrode on each of the semiconductor body and the second semiconductor body.

Status:
Grant
Type:

Utility

Filling date:

26 Dec 2015

Issue date:

22 Mar 2022