Intel Corporation
FLASH MEMORY HAVING IMPROVED PERFORMANCE AS A CONSEQUENCE OF PROGRAM DIRECTION ALONG A FLASH STORAGE CELL COLUMN

Abstract:

A method is described. The method includes programming a column of flash storage cells in a direction along the column in which a parasitic transistor that resides between a cell being programmed and an immediately next cell to be programmed has lower resistivity as compared to a corresponding parasitic transistor that exists if the programming were to be performed in an opposite direction along the column.