Intel Corporation
Memory protection with hidden inline metadata
Last updated:
Abstract:
Embodiments are directed to memory protection with hidden inline metadata. An embodiment of an apparatus includes processor cores; a computer memory for the storage of data; and cache memory communicatively coupled with one or more of the processor cores, wherein one or more processor cores of the plurality of processor cores are to implant hidden inline metadata in one or more cachelines for the cache memory, the hidden inline metadata being hidden at a linear address level.
Status:
Grant
Type:
Utility
Filling date:
29 Mar 2019
Issue date:
29 Mar 2022