Intel Corporation
Systems and Methods for Low Power Modes for Programmable Logic Devices
Last updated:
Abstract:
Systems and methods of the present disclosure may provide efficient power consumption for programmable logic devices based on unused portions of programmable logic. A programmable logic device includes a plurality of programmable logic sectors that implement a circuit design, unused portions of the programmable logic device, and interconnection resources. The interconnection resources include a multiplexer that receives a control signal and that generates an output signal based on the control signal and a driver that receives the output signal and that implements a low-power mode to reduce leakage current.
Status:
Application
Type:
Utility
Filling date:
23 Dec 2021
Issue date:
21 Apr 2022