Intel Corporation
MULTI-LEVEL MEMORY PROGRAMMING AND READOUT

Abstract:

A memory device including a three dimensional crosspoint memory array comprising memory cells each comprising two terminals and a storage element programmable to one of a plurality of program states each representing distinct values for at least two bits; and access circuitry to apply a first program pulse with a positive polarity across the two terminals of a first memory cell of the memory cells to program the first memory cell to a first program state of the program states; and apply a second program pulse with a negative polarity across the two terminals of the first memory cell to program the first memory cell to a second program state of the program states.