Intel Corporation
Transistor with polarization layer superlattice for target threshold voltage tuning
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Abstract:
A semiconductor device is disclosed. The semiconductor device includes a substrate, a superlattice that includes a plurality of layers of alternating materials above the substrate, where each of the plurality of layers corresponds to a threshold voltage, a gate trench extending into the superlattice to a predetermined one of the plurality of layers of the superlattice structure, and a high-k layer on the bottom and sidewall of the trench, the high-k layer contacting an etch stop layer of one of the plurality of layers of alternating materials. A gate is located in the trench on top of the high-k layer.
Status:
Grant
Type:
Utility
Filling date:
22 Jun 2018
Issue date:
10 May 2022