Intel Corporation
Barriers and synchronization for machine learning at autonomous machines
Last updated:
Abstract:
One or more examples include an apparatus having a hardware barrier logic to detect thread groups relating to machine learning operations and facilitate barrier synchronization of the thread groups across multiple dies representing multiple processors, such that data processing using the threads groups across the multiple processors is synchronized and stall-free.
Status:
Grant
Type:
Utility
Filling date:
24 Apr 2017
Issue date:
7 Jun 2022